IOW24 SPI for digital I/O

[willem]

Dear readers,

I'm quite new to both the IOW24 and the SPI protokol and facing some problems.

Expanding "TTL" outputs using a 74HC595 controlled by the IOW24 SPI is working fine.
Next step was using a 74HC165 for TTL input via SPI.

Setting the inputs on the HC165 to the binary repres. of decimal 00 to 04 give me the right
response within the REPORT $09in.
However, when setting inputs to the next value (05 dec) I'll getting 06 as REPORT9 response.
06,07 and 08 decimal working fine but 09 give 10 as response.
Also quite some other values give weird results I can't explain or even understand ....

I tried all the 4 options for CPOL and CPHA. Selecting 00, 01 and 10 give the results as above.
Setting CPOL=1 CPHA=1 results also in errors like

HC165 in - Report9 result
00 - 00
01 - 02
02 - 04
03 - 06

Data rate is 0.0625Mb/sec
Report $09 out flags byte = 01 (one byte to read, no handshake or SS)
Registerclock of the HC165 is controlled by PA.0 (forcing low for 200ms prior to sending
the Report$09 out and Report$09 in)
SI (pin 15) on HC165 is open
QH (pin 9) connected to SPI-MISO IOW24
CLK(pin 2) connected to SPI-SCK IOW24

Any tips to get me on the right way are appreciated!!

Thankyou in advance

Your's

Willem

[Robert Marquardt]

Please post your source here (with code tags around it) or send it to me marquardt att codemercs dott com.
I will have a closer look tomorrow.

[Guido Körber]

SI (pin 15) on HC165 is open

Not a good idea, this is a clock enable. If you let it float then it depends on noise which level it has. There is a good chance that the shifting out of a hih bit causes the level of that pin to change and possible disable the next clock pulse, or to generate another clock pulse. Tie this pin to low.

Same for DS (Pin 10), pull it to a definite level. Never let any inputs float. Some chips have internal pull up or down resistors, but 74xx logic usually does not.

[willem]

Problem as described in my first posting here is finally solved.
In the end it was simple, I just didn't expected it was needed.

You may be curious now..?

OK, I just put a open collector driver (BC547 with serial R 27k in base, emitter to ground, coll. to the MISO) between the HC165 QH serial ouput and theSPI-MISO (IOW24 pin21).

Paralel data is clocked in perfect now!

[Guido Körber]

Now that is strange. I would have built that circuit here but cound not find a HC165 in our stock.

This sounds very much like some side effect. The HC165 shound be well able to drive the IO-Warrior inputs.

[willem]

Guido,
I'm "happy" the effect is also strange to you....It took me quite some time to find the solution.
Watching MISO versus clock on a storagescope showed for sure the serial data was false (concerning paralel input) but the logical levels seems to be OK; also steep 1 to 0 and 0 to 1 crossings.
(if you like to I could mail you some scope screenshots)

It is not a typical HC165 issue, I also build the same functionallity around a HC589 giving the same errors without the open collector buffer.

Greetings,

Willem